Chaogates: Morphing logic gates that exploit dynamical patterns

dc.contributor.authorSinha, Sudeshna
dc.date.accessioned2013-05-01T12:18:03Z
dc.date.available2013-05-01T12:18:03Z
dc.date.issued2010
dc.descriptionOnly IISERM authors are available in the record.
dc.description.abstractChaotic systems can yield a wide variety of patterns. Here we use this feature to generate all possible fundamental logic gate functions. This forms the basis of the design of a dynamical computing device, a chaogate, that can be rapidly morphed to become any desired logic gate. Here we review the basic concepts underlying this and present an extension of the formalism to include asymmetric logic functions.en_US
dc.identifier.citationChaos, 20 (3), art. no. 037107en_US
dc.identifier.urihttps://aip.scitation.org/doi/10.1063/1.3489889en_US
dc.language.isoenen_US
dc.publisherAmerican Institute of Physicsen_US
dc.subjectLogic gate functionsen_US
dc.subjectComputing deviceen_US
dc.titleChaogates: Morphing logic gates that exploit dynamical patternsen_US
dc.typeArticleen_US

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