Utilizing Noise to implement Logical operations in Bistable Systems - V, Manaoj Aravind (IISER Mohali, 2020)
The central theme of this thesis is the study of bistable dynamical systems in the presence of noise and the subsequent use of this understanding to implement highly reliable logic gates that work in the presence of noise. Specifically, we identify the various regimes of behaviours that arise when bistable systems interact with noise. We use this understanding to construct logic gates and identify the parameter ranges where reliable logic operation is achieved. First, we explore the behaviour of two coupled bistable systems that are subject to noises from two independent uncorrelated noise sources. We answer the question, “When do the random hopping events induced by noise, become synchronous in coupled bistable systems?”. Next, we use the above understanding to implement Logical Stochastic Resonance (LSR) in coupled bistable systems. We show that, two coupled bistable sub-systems each individually driven by an input signal, yield outputs that can be mapped to specific 2-input logic gate operations in a robust manner, in an optimal window of noise strength. The collective response of the system due to coupling, in the presence of the noise floor leads to reliable logic operations. We term this phenomena coupling induced Logical Stochastic Resonance (cLSR). The clear advantage of such a system being employed in the generation of reliable logic is that the two inputs can be fed to the two bistable subsystems in completely different noise environments. Lastly, we demonstrate the implementation of a noise-aided logic gate using both LSR and cLSR in a second order autonomous memristive circuit. Memristors are resistors with memory which have been considered promising candidates to implement neuromorphic computing architectures. Here, we construct, simulate and measure the reliability of operation of both LSR and cLSR based logic gates in a memristive circuit. We demonstrate that in an optimal window of noise the memristive circuit produces a very reliable logic output. We also show that due to the inherent symmetry in this system, complementary logic outputs are obtained in parallel from the response of the second state variable. Thus, in this thesis we explore and quantify the behaviour of nonlinear bistable systems interacting with noise and use the understanding to physically implement robust noise-aided logic gates using both simple piece-wise linear elements and memristors which will further the future forms of computing
Keywords: Bistable Systems; Implementation of Noise-aided Logic Gates; Logical Stochastic Resonance; Noise and Nonlinearity