
Browsing by Subject Logic operations
Showing results 1 to 1 of 1
Issue Date | Title | Guide | Type | Author(s) |
---|---|---|---|---|
2014 | Realizing logic gates with time-delayed synthetic genetic networks | - | Article | Kohar, Vivek; Sinha, Sudeshna |
Issue Date | Title | Guide | Type | Author(s) |
---|---|---|---|---|
2014 | Realizing logic gates with time-delayed synthetic genetic networks | - | Article | Kohar, Vivek; Sinha, Sudeshna |